Read more products include Bluespec Compiler, which compiles a high-level model, transactor, test bench, or implementation into Verilog RTL or SystemC. View Jeff Newbern’s professional profile on LinkedIn. Compiler construction, code generation, Haskell and functional programming. Bluespec, Inc.

Download Presentation PowerPoint Slideshow about 'Bluespec-1: Design methods to facilitate rapid growth of SoCs Arvind' - henrik An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. QualityGCD module mkGCD(CLK,RST_N,start_a,start_b,EN_start,RDY_start, result,RDY_result); input CLK; input RST_N; // action method start input [31: 0] start_a; input [31: 0] start_b; input EN_start; output RDY_start; // value method result output [31: 0] result; output RDY_result; // register x and y reg [31: 0] x; wire [31: 0] x$D_IN; wire x$EN; reg [31: 0] y; wire [31: 0] y$D_IN; wire y$EN. // rule RL_subtract assign WILL_FIRE_RL_subtract = x_SLE_y___d3 &&!y_EQ_0___d10; // rule RL_swap assign WILL_FIRE_RL_swap =!x_SLE_y___d3 &&!y_EQ_0___d10. Quality module mkMult (I_mult); Reg#(Int#(32)) product >1; endrule methodAction start (Int#(16)x,Int#(16)y) if (r == 0); d.

Page/Link: Page URL: HTML link: The Free Library. Retrieved Dec 31 2017 from. Business Editors/High-Tech Writers WALTHAM, Mass.--(BUSINESS WIRE)--Dec. 8, 2003 - Waltham, Mass.-based Company Secures $4 Million in First Round for New Assertion-Based Synthesis Toolset that Tames Spiraling Design Complexity and Reduces Verification Cost for ASIC and FPGA Chip Designers - Bluespec Inc., a Waltham, Mass.-based Electronic Design Automation (EDA) tool company, today announced that it intends to manufacture the industry's first SystemVerilog-based EDA toolset for ASIC and FPGA designers to automatically synthesize RTL implementations from high-level design descriptions. Bluespec's toolset dramatically shortens the time to a verified netlist by as much as 50 percent and eliminates the majority of design errors that typically extend design cycles causing product launch delays and mounting design costs. While smaller silicon geometries have delivered millions of gates to hardware designers, the accompanying explosion in design complexity and verification requirements has outstripped the ability for current generation EDA tools to keep pace. Verilog and VHDL design levels are too low forcing hardware designers to do the equivalent of software assembly language programming.

As a result, verification costs have skyrocketed. The EDA industry has proposed two different types of solutions, neither fully addressing these issues. One approach has focused on simulation speed, testbench creation and verification environments to make it easier to verify complex designs. While this approach has been implemented by many, the growth in design complexity has outpaced the benefits provided by these tools and verification costs keep rising.

The second approach, based on C/C++, has attempted to raise the abstraction level of design expression. This approach has had a positive impact in higher-level modeling of complex systems, but has been unable to connect that higher-level model automatically to efficient RTL. A new approach that overcomes these limitations is required.

Bluespec Inc. Has secured $4 million with initial investments from Atlas Venture and North Bridge Venture Partners to manufacture a new toolset that leverages patented technology developed at the Massachusetts Institute of Technology and the emerging SystemVerilog standard. Bluespec's synthesis toolset aggressively attacks the challenges of design complexity, IP, design re-use, and architectural flexibility while producing more correct-by-construction designs. With the investment, Axel Bichara of Atlas Venture and Jeff McCarthy of North Bridge Venture Partners will join the Bluespec board.

'Design and verification cycles are long and expensive and yet logic errors remain the No. 1 cause of re-spins. Moving to smaller process geometries, such as 90 nanometer, will further exacerbate the design productivity problem. We need a significant effort at attacking the root cause of the problem - the design phase - by providing a methodology and toolset that raises the level of abstraction but is grounded in hardware design,' said Shiv Tasker, Bluespec's CEO. 'With our design tools, engineers will get to timing closure faster, reduce verification cost and eliminate bugs and re-spins that contribute to these constant delays.'

At the heart of Bluespec's product is the novel application of Term Rewriting Systems (TRS), a well understood computer science concept, to hardware synthesis - an advanced, patented technology developed at Massachusetts Institute of Technology by Arvind, who is the Johnson Professor of Computer Science and Engineering and also a co-founder and member of Bluespec's board of directors. TRS can be used to model atomicity, which is a powerful mechanism for reasoning about the functional correctness of highly concurrent systems. TRS also provide an excellent basis for producing designs which are correct-by-construction. In conjunction with TRS-based synthesis, Bluespec employs the emerging SystemVerilog language to create an industry standards-based design environment that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high quality RTL, uncompromised in speed, power or area. Bluespec is a member of Accellera, the standards organization that developed SystemVerilog, and is an active contributor to the SystemVerilog language and standardization process. 'There is a major opportunity for high-level EDA tool vendors like Bluespec to save the semiconductor industry billions of dollars in hardware design costs for ASICs and FPGAs,' said Rita Glover, principal analyst at EDA Today. 'Bluespec's use of term-rewriting systems is a new approach that could ease many of the challenges chip designers are facing today.'

Industry experts estimate the design phase consumes more than 50 percent of a product's development budget, making the market for EDA tools that significantly reduce time and costs in the design cycle ripe for opportunity. As time-to-market and profitability pressures continue to escalate, Gartner Dataquest predicts that the EDA tools market will grow at a compound annual growth rate of 19 percent through 2007, reaching $5.9 billion. Seasoned EDA, Semiconductor Industry Veterans Lead the Charge for Bluespec Tasker, co-founder, in addition to his CEO role, has over 15 years experience in the EDA industry at all levels. He was formerly senior vice president of worldwide sales, consulting and marketing at Viewlogic Systems, a supplier of complex EDA tools for integrated circuit and printed circuit board design.

Previously, he was at Intergraph and Valid/Cadence. Tasker recently served as CEO of Phase Forward, a software and service solution vendor for the data collection and management of clinical trials of new drugs and devices. Also a co-founder, Rishiyur Nikhil, Ph.D., joins Tasker on the management team as chief technical officer. Since 2000 Nikhil led the Bluespec technology team at Sandburst Corp., a fabless semiconductor company providing packet switching solutions for scalable, chassis based switching and routing systems. For the previous nine years he was with Cambridge Research Laboratory (DEC/Compaq), serving as Acting Director for over a year. Nikhil was also an associate professor of computer science and engineering at MIT, has led multiple research teams, is widely published and holds several patents in functional programming, dataflow and multithreaded architectures, parallel processing and compiling. 'The EDA industry has consistently shown an appetite for innovative technology that will materially impact the design cycle, which accounts for the majority of a product's cost,' said Axel Bichara, senior principal at Atlas Venture.

'Bluespec is bringing such tools to market. The opportunity at hand is to raise the level of abstraction in chip design, breaking down the walls between the architecture exploration and hardware implementation functions.' Bluespec is continuing product development while engaging with its first set of customer projects and has targeted Q1 2004 for product availability.

About Bluespec Bluespec Inc. Manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high quality RTL, without compromising speed, power or area. The toolset allows ASIC and FPGA designers to significantly reduce design time, bugs and re-spins that contribute to product delays and escalating costs.

More information can be found on www.bluespec.com or by calling 781-250-2200. About Atlas Venture Atlas Venture is the leading international early-stage venture capital firm, investing in communications, information technology and life sciences companies. With investing offices in Boston, London, Munich and Paris, Atlas Venture divides its investments between the United States and Europe. Founded in 1980, Atlas Venture has organized six international funds, and currently manages $2.1 billion in committed capital. The Atlas Venture investment team is comprised of seasoned operating executives and career venture capitalists who have been deeply involved in the formation and development of more than 300 companies worldwide. For more information about Atlas Venture, go to www.atlasventure.com.

About North Bridge Venture Partners North Bridge Venture Partners is an active, early-stage venture capital firm based in the Boston area. With approximately $800 million under management, North Bridge focuses on investments in the communications, software and Internet markets. Working closely with entrepreneurs, North Bridge adds value by providing strategic guidance, specific industry knowledge, team-building skills and an in-depth understanding of both private and public financings. Past investments include ArrowPoint Communications, Cascade Communications, New Oak Communications, Sonus Networks, Sycamore Networks and Wellfleet Communications.

For more information, visit North Bridge's web site at www.nbvp.com. Copyright 2003 Bluespec, Inc. Bluespec is a trademark of Bluespec, Inc. All other brands, products, or service names may be trademarks or service marks of the companies with which they are associated.

Bluespec, Inc. Manufactures silicon-proven electronic design automation synthesis toolsets for the application specific integrated circuits and field programmable gate arrays. ASICSoft Design Partners Connected to You!

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Additionally, we work. Calypto's best-in-class technologies focus on high-level synthesis, RTL power optimization and functional verification. Wise Guides Reviews here. Catapult lets designers use industry standard ANSI C++. SystemC to describe functional intent at the ESL level. From these high-level descriptions, Catapult automatically generates production quality RTL to dramatically shorten both design and verification in today’s hardware design flows. PowerPro is an automated RTL power optimization and analysis product that identifies and inserts sequential clock gating and memory enable logic into synthesizable Verilog and VHDL designs.

PowerPro has proven to reduce power by up to 60% in RTL designs. SLEC is a sequential equivalence checker that handles differences in design state, timing and levels of abstraction. SLEC enables ESL hardware design by using formal methods to comprehensively proving equivalence between RTL implementations and system-level models. The company, with headquarters in San Jose, California, has offices in Japan, India, Europe, and North America. Calypto's customers include Fortune 500 companies worldwide, including nVIDIA, Qualcomm, Renesas, Freescale Semiconductor and STMicroelectronics. The company has partnerships with several Electronic Design Automation (EDA) companies, including Synopsys, Inc., Mentor Graphics, and Cadence Design Systems.